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 July 2006 rev 0.2 Multi-Output Custom Clock Generator
Features
* Generates five clock outputs from an inexpensive 20MHz crystal or external reference clock. * Output Frequencies are selectable through select bits * Generates an EMI optimized clock signal at the output. * 1.5% (Typ) Centre Spread for Spread Spectrum Clock Outputs * Operates with a 3.3V 0.3V Supply Voltage * Output Clocks disable feature using STBY pin * Available in 20-pin TSSOP.
ASM3P4201A
clock generator. The five high frequency Clock outputs are generated using an inexpensive 20MHz Crystal or external reference clock. The accuracy of the 20MHz Input Clock should be within 50ppm. The output clocks consist of a low EMI spread spectrum clock and other non-spread clocks. Three Select bits choose the combination of Output Clock Frequency. Refer to the Output Frequency Selection Table for the values. Output clocks can be disabled using the STBY pin. The device operates from a Supply Voltage of 3.3V0.3V with a tolerable ripple voltage of 50mV . The device is available in a 20 pin TSSOP JEDEC package.
Product Description
The ASM3P4201A is a versatile multi output custom
Block Diagram
S0 S1 S2 VDD STBY
CLK6
XIN XOUT Crystal Oscillator PLL
CLK1
CLK5
CLK2 CLK3
CLK4
GND
PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 * Tel: 408-879-9077 * Fax: 408-879-9018 www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
July 2006 rev 0.2
Pin Assignment
XIN S0 S1 CLK6 VDD GND CLK1 NC CLK2
1 2 3 4 5 6 7 8 9 20 19 18 17
ASM3P4201A
XOUT VDD STBY S2
ASM3P4201A
16 VDD 15 GND 14 CLK3 13 CLK4 12 CLK5 11 NC
GND 10 20 pin TSSOP
Pin Description Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Pin Name
XIN S0 S1 CLK6 VDD GND CLK1 NC CLK2 GND NC CLK5 CLK4 CLK3 GND VDD S2 STBY VDD XOUT
Pin Type
Input Input Input Output Power Power Output Output Power Output Output Output Power Power Input Input Power Output
Pin Description
Crystal connection or external reference frequency input. It can be connected to a 20MHz Fundamental mode crystal or to an external reference clock. Select Bit for Desired Output Frequency at different output pins. Refer to the Output Frequency Selection Table for details. Has an internal pull down resistor Select Bit for Desired Output Frequency at different output pins. Refer to the Output Frequency Selection Table for details. Has an internal pull down resistor Clock Output. Refer to the Output Frequency Selection Table for details. Connect to +3.3V. Connect to ground. Clock Output. Refer to the Output Frequency Selection Table for details. No connect Clock Output. Refer to the Output Frequency Selection Table for details. Connect to ground. No connect Clock Output. Refer to the Output Frequency Selection Table for details. Spread Spectrum Clock Output. Refer to the Output Frequency Selection Table for details. Spread Spectrum Clock Output. Refer to the Output Frequency Selection Table for details. Connect to ground. Connect to +3.3V. Select Bit for Desired Output Frequency at different output pins. Refer to the Output Frequency Selection Table for details. Has an internal pull down resistor When this pin is made is HIGH, all the output clocks are enabled. Connect to +3.3V. Crystal connection. If an external reference clock is used, this pin must be left unconnected.
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
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July 2006 rev 0.2
Output Frequency Selection Table Selection Bits
S2 S1 S0
ASM3P4201A
CLK1 (MHz)
39.5 39.5 39.5 39.5
CLK2 (MHz)
20 20 20 20
CLK3* (MHz)
65 60 50 75
CLK4* (MHz)
20 20 20 20
CLK5 (MHz)
84 84 36 84
CLK6 (MHz)
36.6 36.6 36.6 36.6
0 0 0 0
0 0 1 1
0 1 0 1
* CLK3 and CLK4 are Spread Spectrum Clocks
Absolute Maximum Ratings Symbol
VDD VIN TSTG TA Ts TJ TDV
Parameter
Power Supply Voltage relative to Ground Input Voltage relative to Ground (Input Pins) Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
Rating
-0.5 to +4.6 -0.5 to VDD+0.3 -65 to +150 -20 to +85 260 125 2
Unit
V C C C C KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+ 25C) unless otherwise stated)
Symbol
VIL VIH IIL IIH IXOL IXOH VOL VOH IDD ICC VDD tON ZOUT Input low voltage Input high voltage Input low current Input high current
Parameter
Min
GND - 0.3 2.0 2.5 3.0 -
Typ
3 3 TBD TBD 3.3 17
Max
0.8 VDD + 0.3 -35 35 0.4 3.6 5 -
Unit
V V A A mA mA V V mA mA V mS
XOUT output low current (VXOL@0.4V, VDD=3.3V) XOUT output high current (VXOH @2.5V, VDD=3.3V) Output low voltage (VDD = 3.3V, IOL =12mA) Output high voltage (VDD = 3.3V, IOH =12mA) Static supply current* Dynamic supply current ( VDD =3.3V ) Operating Voltage Power-up time (first locked cycle after power-up)** Output impedance
* XIN and STBY Pins are pulled low ** VDD and XIN input are stable,
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
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July 2006 rev 0.2
AC Electrical Characteristics Symbol
CLKIN Input frequency Output Frequency =20MHz (Pin 13) Output Frequency = 50MHz Output Frequency = 60MHz Output Frequency = 65MHz Output Frequency = 75MHz
ASM3P4201A
Parameter
Min
-
Typ
20
Max
-
Unit
MHz
fd
Spread Percentage
-
1.5
-
%
tLH* tHL * tJC tp tD
Output rise time (Measured from 0.8V to 2.0V) Output fall time ( Measured from 2.0V to 0.8V) Jitter (Cycle to cycle) Jitter( Period) Output duty cycle
45
250 150 50
1 1 55
nS nS pS pS %
*tLH and tHL are measured into a capacitive load of 30pF
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
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July 2006 rev 0.2
Package Information
ASM3P4201A
20-lead Thin Shrunk Small Outline Package (4.40-MM Body) - JEDEC Standard
Dimensions Symbol
A A1 A2 D L E E1 R1 b c L1 e a
Inches Min Max
.... 0.0020 0.031 0.252 0.020 0.169 0.004 0.007 0.004 0.043 0.0059 0.041 0.26 0.030 0.177 .... 0.012 0.008
Millimeters Min Max
... 0.05 0.80 6.40 0.50 4.30 0.09 0.19 0.09 1.2 0.15 1.05 6.60 0.75 4.50 ..... 0.30 0.20
0.252 BSC
6.40 BSC
0.039 REF 0.026 BSC 0 8 0
1.0 REF 0.65 BSC 8
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
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July 2006 rev 0.2
Ordering Information Part Number
ASM3P4201AG-28-TT ASM3P4201AG-28-TR
ASM3P4201A
Marking
3P4201AG 3P4201AG
Package
20-Pin TSSOP, Tube, Green 20-Pin TSSOP, Tape and Reel, Green
Temperature
Commercial Commercial
Device Ordering Information
ASM3P4201AG-20-TT
OR - TSOT23 -6,T/R TT - TSSOP, TUBE TR - TSSOP, T/R VT - TVSOP, TUBE VR - TVSOP, T/R ST - SOIC, TUBE AR - SSOP, T/R AT - SSOP, TUBE PIN COUNT G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X = Automotive (-40C to +125C) I = Industrial P or n/c = Commercial (-40C to +85C) (0C to +70C) 6 - power management 7 - power management 8 - power management 9 - Hi performance 0 - reserved SR QR QT BT BR UR DR DT - SOIC, T/R - QFN, T/R - QFN, TRAY - BGA, TRAY - BGA, T/R - SOT-23, T/R - QSOP, T/R - QSOP, TUBE
1 - reserved 2 - Non PLL based 3 - EMI Reduction 4 - DDR support products 5 - STD Zero Delay Buffer
PulseCore Semiconductor Mixed Signal Product
Licensed under US patent Nos 5,488,627 and 5,631,920
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
6 of 7
July 2006 rev 0.2
ASM3P4201A
.
PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com
Copyright (c) PulseCore Semiconductor All Rights Reserved Part Numbers: ASM3P4201A Document Version: 0.2
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
(c) Copyright 2003 PulseCore Semiconductor. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of PulseCore. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore's best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore's Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore's Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use
Multi-Output Custom Clock Generator
Notice: The information in this document is subject to change without notice.
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